MIT PDP-10 'Info' file converted to Hypertext 'html' format by Henry Baker

The effective address computation uses three fields of the instruction word: the 18-bit address field (Y), the index field (X), and the indirect bit (I). The result is an 18-bit effective address.

If the X field and I bit are zero, the effective address is simply the contents of the address field (Y).

If the index field X is nonzero, then it is the number of an accumulator to use as an index rgister. Any accumulator except accumulator 0 can be so used. The right half of the contents of the index register is added to the address field (Y) from the instruction to get the effective address.

The I bit specifies indirect addressing. If it is 1, then the result of the previous steps (Address field, or address field plus index quantity) is used as the address of an "indirect word". From the contents of this indirect word, a new address field Y, index field X and indirect bit I are obtained. Then the process starts from the beginning. If the I bit in the indirect word is 1, a second indirect word is eventually fetched. Indirection can happen any number of times, and only stops when an indirect word has 0 in its I bit.

The result of the effective address calculation may be thought of as an instruction word where bits 0:12 are copied from the original instruction, bits 13:17 are zero, and 18:35 contain the effective address.

The effective address computation is described by the following program. MA means memory address. PC means program counter. C(MA) means contents of the word addressed by MA.

```IFETCH: MA <- PC
OP <- Bits  0:8  of C(MA);
AC <- Bits  9:12 of C(MA);
EACOMP: I  <- Bit  13    of C(MA);
X  <- Bits 14:17 of C(MA);
Y  <- Bits 18:35 of C(MA);
E  <- Y;
IF NOT(X=0) then E <- E+C(X);
IF I=0 then go to done;
MA <- E;
GO TO EACOMP;
DONE:
```