MASSBUS PINOUT AND RP06 DRIVE REGS COMPILED BY JOHN WILSON FROM VARIOUS PRINTS, 26-MAR-1993 FROM RH20 PRINTS (MP00056): A, B, C = 40-PIN CONNECTORS, NUMBERED LIKE IN OUTSIDE WORLD 1-40 A1 D00 L A2 D00 H A3 D01 H A4 D01 L A5 D02 L A6 D02 H A7 D03 H A8 D03 L A9 D04 L A10 D04 H A11 D05 H A12 D05 L A13 C00 L A14 C00 H A15 C01 H A16 C01 L A17 C02 L A18 C02 H A19 C03 H A20 C03 L A21 C04 L A22 C04 H A23 C05 H A24 C05 L A25 SCLK L A26 SCLK H A27 RS3 H A28 RS3 L A29 ATTN H A30 ATTN L A31 RS4 L A32 RS4 H A33 CTOD L A34 CTOD H A35 WR CLK H A36 WR CLK L A37 RUN H A38 RUN L A39 SP3 ;; SP3 H ??? ;;;RP04-6 TIES TO +5 THROUGH DIODE + RES ;;; AND CALLS IT F01TL A40 GROUND B1 D06 L B2 D06 H B3 D07 H B4 D07 L B5 D08 L B6 D08 H B7 D09 H B8 D09 L ;;; B9 IN PRINT B9 D10 L B10 D10 H B11 D11 H B12 D11 L B13 C06 L B14 C06 H B15 C07 H B16 C07 L B17 C08 L B18 C08 H B19 C09 H B20 C09 L B21 C10 L B22 C10 H B23 C11 H B24 C11 L B25 EXC L B26 EXC H B27 RS0 H B28 RS0 L B29 EBL L B30 EBL H B31 RS1 L B32 RS1 H B33 RS2 L B34 RS2 H B35 INIT H B36 INIT L B37 SP1 L ;;SPARE 1 B38 SP1 H ;;SPARE 1 B39 SP3 L ;;"F02T2" W/PULLUP THROUGH DIODE+RES B40 GROUND C1 D12 L C2 D12 H C3 D13 H C4 D13 L C5 D14 L C6 D14 H C7 D15 H C8 D15 L C9 D16 L C10 D16 H C11 D17 H C12 D17 L C13 DPA L C14 DPA H C15 C12 H C16 C12 L C17 C13 L C18 C13 H C19 C14 H C20 C14 L C21 C15 L C22 C15 H C23 CPA H C24 CPA L C25 OCC L C26 OCC H C27 DS0 H C28 DS0 L C29 TRA H C30 TRA L C31 DS1 L C32 DS1 H C33 DS2 L C34 DS2 H C35 DEM H C36 DEM L C37 SP2 H C38 SP2 L C39 FAIL H ;;E03T2 TC0 MASS FAIL A H C40 GROUND I=INPUT FROM DRIVE, O=OUTPUT TO DRIVE D00-17,DPA I/O 18-BIT DATA BUS, PARITY SCLK I SYNC CLK (FROM DRIVE) WR CLK O WRITE CLK (ECHO SCLK DURING WRITES) C00-15,CPA I/O 16-BIT CONTROL BUS, PARITY RS0-4 O 5-BIT REGISTER SELECT DS0-2 O 3-BIT DRIVE SELECT ATTN I DRIVE ATTENTION CTOD O CONTROLLER-TO-DRIVE RUN O RUN (TELL DRIVE TO ACTUALLY DO SOMETHING) EXC I DRIVE EXCEPTION (PARITY ERROR) EBL I END OF BLOCK (DRIVE SAMPLES RUN ON TRAILING EDGE) INIT O INIT BUS OCC I ANT DATA COM (="I'M GONNA PUKE!!!") TRA I TRANSFER (=SSYN) DEM O DEMAND BUS (=MSYN) FAIL O (CONTROLLER POWER FAIL) TOTAL OF 36 BIDIRECTIONAL DATA LINES, 14 OUTPUT LINES (TO DRIVE), 6 INPUT LINES (FROM DRIVE). SO WE (DRIVE) NEED 50 INPUT BUFFERS AND 42 OUTPUT BUFFERS. ON RH20: ALL OUTPUT PINS ARE DRIVEN BY 75113'S WITH INVERTING OUTPUT (PIN 2/14) TIED TO +5V THROUGH 82 OHMS AND NON-INVERTING OUTPUT (PIN 4/12) TIED TO GROUND THROUGH 82 OHMS. ALL INPUT PINS ARE RECEIVED BY 75107'S. SOME INPUT SIGNALS ARE TERMINATED BY 82 OHMS TO +5V (L) AND GND (H). RP04-06: BUS IS DRIVEN BY PINS 1/3 OR 13/15 OF 75113'S, RECEIVED BY 75108'S PIN 39 IS TIED TO 4.7K RESISTOR, TO +5 THROUGH A D762 DIODE. M5903'S HAVE A -5V REGULATOR SO THESE CHIPS MUST NEED IT. CLUELESSNESS: REGISTERS: (SEE RG5 (M7774) FROM RP06) BIT NAMES ARE FROM RP05/06 INST MANUAL. 00 CTRL CONTROL REGISTER 11=DVA 5:0=FUNCTION FUNCTIONS: (LOOKS LIKE BIT 0 IS "GO") 01 NO OP 03 UNLOAD 05 SEEK 07 RECALIBRATE 11 DRIVE CLEAR 13 RELEASE 15 OFFSET 17 RETURN TO CENTERLINE 21 READ-IN PRESET 23 PACK ACKNOWLEDGE 31 SEARCH 61 WRITE DATA 63 WRITE HEADER AND DATA 71 READ DATA 73 READ HEADER AND DATA 01 STATUS STATUS REGISTER 15=RTA STAT ATA (OUR ATA BIT?) 14=ERR COMP ERR (COMPOSITE ERROR?) 13=PIP POSITIONING IN PROGRESS (FUNC=03, 05, 07, 15, 17) 12=MOL ON-LINE 11=WRL WRITE LOCKED 10=LST LAST SEC XFR 9=DGM PROGRAMMABLE (???) 8=DPR DRIVE PRESENT? WIRED TO +3V 7=DRY DRIVE READY (=GO (0) H) 6=VV VOLUME VALID 5=0 ("DIF=1" IN M7774 (RP06) PRINTS) 4=0 ("DIF LESN 64" IN M7774 PRINTS) 3=0 ("GO REV" IN M7774 PRINTS) 2=0 ("DRV TO IN" IN M7774 PRINTS) 1=0 ("DRV/FWD 20 IPS" IN M7774 PRINTS) 0=0 ("DRV FWD 5 IPS" IN M7774 PRINTS) 02 ER1 ERR REG 01 15=DCK DRIVE CHECK??? 14=UNS UNSAFE??? 13=OPI OPERATION INCOMPLETE??? 12=DTE DRIVE TIMING ERROR??? 11=WLE WRITE LOCKED ERROR??? 10=IAE 9=AOE 8=HC/RC 7=HCE 6=ECH 5=WCF 4=FER 3=PAR PARITY ERROR??? 2=RMR 1=ILR ILLEGAL REGISTER (RS.GT.17) 0=ILF ILLEGAL FUNCTION 03 MAINT MAINT REG 15:11 UNDEFINED H1/CNT SYN/DET 0/DET DTA/ENV ECC/ENV WET/DAT RD/DAT DTA/CLK M/IND SEC/CLK MAIN 04 ATA ATTENTION SUMMARY (OUR BIT CLEARED BY WRITING 1 TO IT (?)) THE FOLLOWING APPEAR TO BE GROUNDS FOR ATTN: (SEE RG5 (M7774) RP06) * OUTSTANDING REQUEST AND OTHER PORT RELEASES * CHANGE FROM ON-LINE TO OFF-LINE OR VICE VERSA, UNLESS UNLOAD CMD * ON-LINE AND: COMP ERR (=ERR IN STATUS REG) AND "GO" BOTH SET 05 DA DESIRED ADDRESS 12:8=TRACK, 4:0=SECTOR 06 DRV TYPE 11=X "DRV REQ RQ H" IN RP06 PRINTS (=DUAL-PORTED???) (0 IF W9 IS INSTALLED IN M7776, OTHERWISE 1) OTHERWISE (SP/DP): 020020/024020=RP04 020021/024021=RP05 020022/024022=RP06 07 LA LOOK AHEAD 10:6=SECT (CURR SECTOR # ?) 5:0=EXT (HIGH 6 BITS OF 10-BIT BYTE COUNTER (WITHIN SECTOR)) 10 S/N SERIAL NUMBER (4 BCD DIGITS) (R/O) 11 OFFSET 15=SGN 14:13 UNDEF 12=FMT 11=ECI 10=HCI 9:8 UNDEF 7:0=OF 12 DCY DESIRED CYLINDER ADDRESS 9:0=DESIRED CYL 13 CCY CURRENT CYLINDER ADDRESS 9:0=CURRENT CYL 14 ER2 ERR REG 02 (R/W) 13=PLU 11=IXE 10=NHS 9=MHS 8=WRU 7=ABS 6=TUF 5=TDF 4=RAW 3=CSV 2=WSU 1=CSF 0=WCU 15 ER3 ERR REG 03 (R/W) 15=OCYL 14=SKI 13=OPE 12:7 UNDEF 6=ACL AC LOW??? 5=DCL DC LOW??? 4=35/VF 3:2 UNDEF 1=WAO 0=DCU 16 ECC POS 12:0=POSITION 17 ECC PAT 10:0=POSITION 20-37 APPARENTLY RESERVED (ACCESS SETS ILR) RP06 LATCHES CTOD AT LEADING EDGE OF DEM. DP6 (M7787) HAS ME TOTALLY CONFUSED: THERE APPEARS TO BE A 10-BIT COUNTER, THE HIGH 6 BITS OF WHICH FORM THE SECTOR EXT. COUNTER, WHICH IS CLEARED AT EACH INDEX PULSE AND THEN COUNTS SOMETHING. IT RECYCLES AT 608. IN 22-SECTOR MODE, AND 671. IN THE OTHER MODE (20 SECTORS?). MAYBE IT'S COUNTING SOME KIND OF CLOCK WITHIN THE SECTOR? IT CAN BE INCREMENTED BY MAINT.