PDP-10 Processors

Wanted: Information about Dolphin and Minnow.

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Hardware characteristics

References: PDP-6 Arithmetic Processor 166 Instruction Manual. DECsystem-10 / DECSYSTEM-20 Processor Reference Manual, updated 1982. TOAD-1 Architecture Reference Manual, updated 1999. Joe Smith's PDP-10 models document, updated 2001. Other references are linked from the table.

Name Vendor Year Clock
speed
(MHz)		 Virtual
memory
address
(bits)		 Physical
memory
address
(bits)		 Max
memory
(words)		 Cache
(words)		 Page table
entries		 Front
end		 Microcode
(words x size)		 Comment
Type 166 DEC 1964 Async 18 18 256K No None None No  
KA10 DEC 1967 Async 18 18 256K No None None No  
KI10 DEC 1971-72 9.1 18 22 4M No 32 None No  
KL10-PA DEC 1974 25 18 22 4M 2K 512 PDP-11/40 1280 x 80 KL10 Model A
KL10-PV DEC 1978? 30 23 22 4M 2K 512 PDP-11/40 2K x 80 KL10 Model B
KL10-PW DEC 1984? 30 23 22 4M 4K 1K PDP-11/40 2K x 80 KL10 Model B
KS10 DEC 1978 20 18 20 512K 512 512 8080 2K x 96 Some configurations support 1MW memory.
KC10 DEC cancelled 50-100 30         F-11   "Jupiter"
MAXC Xerox PARC ca 1972? 6.7 18 21 1M No 1K Nova 1K or 2K x 72 KA10 clone with BBN pager
F-1 Foonly 1974-78? 10 18     2K 512 KA10 2K x 72
F-2 Foonly     18             Small
F-3 Foonly 1979-82   18           Yes KL10 clone, designed as F-1 front end
F-4 Foonly 1983?   18           Yes KL10 clone, KI paging
F-5 Foonly 1981?                 Desktop model
System 26 Tymshare <1984   18             KA10 clone with BBN pager, based on F-4
System 26KL Tymshare 1984-86   23?     No   IBM PC-XT   KL10 clone with BBN pager, based on F-4
SC-20 SC Group   SC-25 / 2 23?         SPARC    
SC-25 SC Group     23?         SPARC    
SC-30M SC Group 1985   23?         SPARC   "Mars"
SC-40 SC Group 1993   30 26 64M 32K 2K SPARC 32K x 80  
1994 33 30 33 128M 128K 8K Builtin 8K x 128  
200? 30 Yes  
? Neil Franklin 200? Microcontroller No  
PDP-10/X David Conroy 2002 33? 18 22 4M No 1K 32K x 24 Runs ITS

Simulator characteristics

Name Author Year Virtual
memory
address
(bits)		 Physical
memory
address
(bits)		 Max
memory
(words)		 Page table
entries		 Comment
KN10-KS Ken Harrenstien 1992 18 19 512K   KLH10 - KS10 version
KN10-KL Ken Harrenstien 1994? 23 22 4M   KLH10 - KL10 Model B version
kx10 Stu Grossman 1995? 23 22 4M   KL10 Model B version
TS-10 Tim Stark 2000 18 19 512K    
TS-10 Tim Stark 2002? 23 22 4M   KL10 Model B version
SIMH Bob Supnik 2001 18 19 512K    

Instruction set

References: DECsystem-10 / DECSYSTEM-20 Processor Reference Manual, updated 1982. TOAD-1 Architecture Reference Manual, updated 1999. Usenet articles and private communications as linked from the table.

FADRL
FSBRL
FMPRL
FDVRL 		FADL
FSBL
FMPL
FDVL 		UFA
DFN		 FADRI
FSBRI
FMPRI
FDVRI 		JFFO PXCT DFAD
DFSB
DFMP
DFDV		 DMOVE
DMOVN		 FIX,
etc		 DADD
DSUB
DMUL
DDIV		 String XBLT EXT
END		 ADJBP
ADJSP		 G-
float		 bit
reversal
Type 166 Yes Yes No No No No No No No No No No No No No No
KA10 No Yes Yes Yes Yes No No No No No No No No No No No
KI10 No Yes Yes Yes Yes Yes Yes Yes Yes No No No No No No No
KL10 No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No
KL10 B No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No
KS10 No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No
KC10 No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No
MAXC     KA10 clone.                 No
F-1     Operated in KA10 mode.                 No
F-2                                
F-3                   Yes       Yes?    
F-4           Yes Yes Yes Yes Yes     Yes Yes    
F-5                               Yes
System 26                                
System 26KL No No No Yes Yes Yes Yes Yes Yes Yes Yes   Yes Yes    
SC-20 No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No
SC-25 No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No
SC-30M No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No
SC-40 No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No
No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No

Quirks

166 KA10 KI10 KL10 KS10 F-2 F-3 SC-30M
SUB/SOJ/SOS flags Yes No No No No No No
JRSTF with indexing Yes No No No No No No
IDIV overflow Yes No No No No No
POP AC,AC result Ptr Mem
IBP overflow Yes Yes No No No No No No
AOBJX overflow Yes Yes No No No Yes Yes No
MUL AC=-235 treated as 235 Yes No No No No
BLT AC unpredictable Yes Yes Yes No No No
FSC some overflows undetected Yes Yes No No No
FDV negative result 2's compl Yes Yes Yes No No No
DMOVN flags not set - - Yes No No No
DFMP, DFDV expects normalized operands - - Yes No No No
Reverse BLT AC funny Yes No
ADJBP -235 - - - Yes No - - No
CVTBDX flags - - - Yes No - - No
IDIV clobber No Yes No
IBP OWGBP PS=45 - - - Yes - - No

Last changed , by lars